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TODAES
2008
158views more  TODAES 2008»
14 years 9 months ago
Designing secure systems on reconfigurable hardware
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
Ted Huffmire, Brett Brotherton, Nick Callegari, Jo...
WORDS
2003
IEEE
15 years 3 months ago
A Framework for Scalable Analysis and Design of System-wide Graceful Degradation in Distributed Embedded Systems
We present a framework that will enable scalable analysis and design of graceful degradation in distributed embedded systems. We define graceful degradation in terms of utility. A...
Charles P. Shelton, Philip Koopman, William Nace
DAC
2005
ACM
15 years 10 months ago
Simulation based deadlock analysis for system level designs
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. S...
GLOBECOM
2009
IEEE
15 years 4 months ago
Joint MMSE Transceiver Design for Closed-Loop Non-Regenerative MIMO Relaying Systems
— In this paper, as a extended structure of the existing relay-destination joint minimum mean square error (MMSE) design, we propose a new source-relay-destination joint MMSE des...
Chang-Ick Song, Kyoung-Jae Lee, Inkyu Lee
DATE
1999
IEEE
139views Hardware» more  DATE 1999»
15 years 2 months ago
OpenJ: An Extensible System Level Design Language
There is an increasing research interest in system level design languages which can carry designers from specification to implementation of system-on-a-chip. Unfortunately, two of...
Jianwen Zhu, Daniel Gajski