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ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...
ACSC
2004
IEEE
15 years 3 months ago
Flexible Layering in Hierarchical Drawings with Nodes of Arbitrary Size
Graph drawing is an important area of information visualization which concerns itself with the visualization of relational data structures. Relational data like networks, hierarch...
Carsten Friedrich, Falk Schreiber
CONCUR
2006
Springer
15 years 3 months ago
Minimization, Learning, and Conformance Testing of Boolean Programs
Boolean programs with recursion are convenient abstractions of sequential imperative programs, and can be represented as recursive state machines (RSMs) or pushdown automata. Motiv...
Viraj Kumar, P. Madhusudan, Mahesh Viswanathan
ICML
1994
IEEE
15 years 3 months ago
A Modular Q-Learning Architecture for Manipulator Task Decomposition
Compositional Q-Learning (CQ-L) (Singh 1992) is a modular approach to learning to performcomposite tasks made up of several elemental tasks by reinforcement learning. Skills acqui...
Chen K. Tham, Richard W. Prager
CC
2008
Springer
15 years 1 months ago
Generating SIMD Vectorized Permutations
Abstract. This paper introduces a method to generate efficient vectorized implementations of small stride permutations using only vector load and vector shuffle instructions. These...
Franz Franchetti, Markus Püschel