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113
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ACL
2004
15 years 5 months ago
Balancing Clarity and Efficiency in Typed Feature Logic Through Delaying
The purpose of this paper is to re-examine the balance between clarity and efficiency in HPSG design, with particular reference to the design decisions made in the English Resourc...
Gerald Penn
148
Voted
AGTIVE
2007
Springer
15 years 9 months ago
Programmed Graph Rewriting with DEVS
In this article, we propose to use the Discrete EVent system Specification (DEVS) formalism to describe and execute graph transformation control structures. We provide a short rev...
Eugene Syriani, Hans Vangheluwe
101
Voted
FDL
2007
IEEE
15 years 10 months ago
How Different are Esterel and SystemC?
In this paper, we compare the underlying models of computation of the system description languages SystemC and Esterel. Although these languages have a rather different origin, we...
Jens Brandt, Klaus Schneider
123
Voted
TSD
2004
Springer
15 years 9 months ago
Advanced Prosody Modelling
Abstract. A formal prosody model is proposed together with its application in a text-to-speech system. The model is based on a generative of abstract prosodic functionally involved...
Jan Romportl, Jindrich Matousek, Daniel Tihelka
DATE
2002
IEEE
124views Hardware» more  DATE 2002»
15 years 8 months ago
Parameter Controlled Automatic Symbolic Analysis of Nonlinear Analog Circuits
In this paper we introduce an approach for parameter controlled symbolic analysis of nonlinear analog circuits. Based on a state-of–the-art algorithm, it enables the removal of ...
Ralf Popp, Joerg Oehmen, Lars Hedrich, Erich Barke