2816 search results - page 406 / 564 » Submodular function minimization |
ICCD
2001
IEEE
15 years 7 months ago
2001
IEEE
Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Annealing is used, e.g., with the Sequence Pair representation, the typical choice o...
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ICCD
2001
IEEE
15 years 7 months ago
2001
IEEE
As the operating frequency increases to Giga Hertz and the rise time of a signal is less than or comparable to the time-of-flight delay of a line, it is necessary to consider the...
ICCAD
2007
IEEE
15 years 7 months ago
2007
IEEE
— In this paper, we present the first work on the Steiner routing for 3D stacked ICs. In the 3D Steiner routing problem, the pins are located in multiple device layers, which ma...
ICCAD
2005
IEEE
15 years 7 months ago
2005
IEEE
In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog ...
ICCAD
2002
IEEE
15 years 7 months ago
2002
IEEE
This paper presents an in-depth study of the theory and algorithms for the SPFD-based (Set of Pairs of Functions to be Distinguished) rewiring, and explores the flexibility in the...