This paper presents an irredundant encoding technique to minimize the switching activity on a multiplexed Dynamic RAM (DRAM) address bus. The DRAM switching activity can be classif...
—We provide a syntactic analysis of contextual preorder and equivalence for a polymorphic programming language with effects. Our approach applies uniformly across a range of alge...
A major trend in HPC is the escalation toward manycore, where systems are composed of shared memory nodes featuring numerous processing units. Unfortunately, with scale comes compl...
Teng Ma, George Bosilca, Aurelien Bouteiller, Jack...
—High-gain proportional–integral–derivative (PID) position control involves some risk of unsafe behaviors in cases of abnormal events, such as unexpected environment contacts...
Ryo Kikuuwe, S. Yasukouchi, Hideo Fujimoto, Motoji...
The first stage of the signal processing chain in a Global Positioning System (GPS) receiver is the acquisition, which provides for a desired satellite coarse code phase and Dopple...