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ISLPED
2009
ACM
108views Hardware» more  ISLPED 2009»
15 years 9 months ago
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
David Bol, Denis Flandre, Jean-Didier Legat
FPL
2009
Springer
96views Hardware» more  FPL 2009»
15 years 9 months ago
Noise impact of single-event upsets on an FPGA-based digital filter
Field-programmable gate arrays are well-suited to DSP and digital communications applications. SRAM-based FPGAs, however, are susceptible to radiation-induced single-event upsets ...
Brian H. Pratt, Michael J. Wirthlin, Michael P. Ca...
ICIC
2009
Springer
15 years 9 months ago
Dimension Reduction Using Semi-Supervised Locally Linear Embedding for Plant Leaf Classification
Plant has plenty use in foodstuff, medicine and industry, and is also vitally important for environmental protection. So, it is important and urgent to recognize and classify plant...
Shanwen Zhang, Kwok-Wing Chau
COSIT
2001
Springer
122views GIS» more  COSIT 2001»
15 years 9 months ago
Spatial and Cognitive Simulation with Multi-agent Systems
The simulation of human behavior in space is an extremely interesting and powerful research method to advance our understanding of human spatial cognition and the interaction of hu...
Andrew U. Frank, Steffen Bittner, Martin Raubal
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
15 years 9 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor