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DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 8 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
SIGIR
2010
ACM
15 years 7 months ago
Learning more powerful test statistics for click-based retrieval evaluation
Interleaving experiments are an attractive methodology for evaluating retrieval functions through implicit feedback. Designed as a blind and unbiased test for eliciting a preferen...
Yisong Yue, Yue Gao, Olivier Chapelle, Ya Zhang, T...
CHES
2008
Springer
146views Cryptology» more  CHES 2008»
15 years 5 months ago
Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration
Dynamically reconfigurable systems are known to have many advantages such as area and power reduction. The drawbacks of these systems are the reconfiguration delay and the overhead...
Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhe...
IJCAI
2003
15 years 5 months ago
Expressive Power of Tree and String Based Wrappers
There exist two types of wrappers: the string based wrapper such as the LR wrapper, and the tree based wrapper. A tree based wrapper designates extraction regions by nodes on the ...
Daisuke Ikeda, Yasuhiro Yamada, Sachio Hirokawa
JUCS
2002
80views more  JUCS 2002»
15 years 3 months ago
On the Power of P Systems with Symport Rules
: A purely communicative variant of P systems was considered recently, based on the trans-membrane transport of couples of chemicals. When using both symport rules (the chemicals p...
Carlos Martín-Vide, Andrei Paun, Gheorghe P...