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VMCAI
2010
Springer
16 years 1 months ago
Building a Calculus of Data Structures
Abstract. Techniques such as verification condition generation, preditraction, and expressive type systems reduce software verification to proving formulas in expressive logics. Pr...
Viktor Kuncak, Ruzica Piskac, Philippe Suter, Thom...
LICS
2007
IEEE
15 years 10 months ago
First-Order and Temporal Logics for Nested Words
Nested words are a structured model of execution paths in procedural programs, reflecting their call and return nesting structure. Finite nested words also capture the structure ...
Rajeev Alur, Marcelo Arenas, Pablo Barceló,...
FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
15 years 8 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski
FAC
2008
114views more  FAC 2008»
15 years 4 months ago
Specification of communicating processes: temporal logic versus refusals-based refinement
Abstract. In this paper we consider the relationship between refinement-oriented specification and specifications using a temporal logic. We investigate the extent to which one can...
Gavin Lowe
CONCUR
1991
Springer
15 years 7 months ago
A Method for the Development of Totally Correct Shared-State Parallel Programs
Abstract. A syntax-directed formal system for the development of totally correct programs with respect to an (unfair) shared-state parallel programming language is proposed. The pr...
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