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ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
15 years 11 months ago
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
Nathan Clark, Jason A. Blome, Michael L. Chu, Scot...
ISCAS
2005
IEEE
105views Hardware» more  ISCAS 2005»
15 years 11 months ago
Low-sensitivity current-mode active-RC filters using impedance tapering
—This paper is concerned with a new design method of low-sensitivity current-mode filters, which results from lowsensitivity voltage-mode filter design using impedance tapering. ...
Drazen Jurisic, Neven Mijat, George S. Moschytz
ISM
2005
IEEE
74views Multimedia» more  ISM 2005»
15 years 11 months ago
Striping Delay-sensitive Packets over Multiple Burst-loss Channels with Random Delays
Multi-homed mobile devices have multiple wireless communication interfaces, each connecting to the Internet via a long range but low speed and bursty WAN link such as a cellular l...
Gene Cheung, Puneet Sharma, Sung-Ju Lee
ISORC
2005
IEEE
15 years 11 months ago
Placement Solutions for Multiple Versions of A Multimedia Object
Transcoding is an important technology which adapts the same multimedia object to diverse mobile appliances; thus, users’ requests for a specified version of a multimedia objec...
Keqiu Li, Hong Shen, Francis Y. L. Chin
175
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PDP
2005
IEEE
15 years 11 months ago
Memory Bandwidth Aware Scheduling for SMP Cluster Nodes
Clusters of SMPs are becoming increasingly common. However, the shared memory design of SMPs and the consequential contention between system processors for access to main memory c...
Evangelos Koukis, Nectarios Koziris