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RTAS
1998
IEEE
15 years 8 months ago
Bounding Loop Iterations for Timing Analysis
Static timing analyzers need to know the minimum and maximum number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. ...
Christopher A. Healy, Mikael Sjödin, Viresh R...
IPPS
1996
IEEE
15 years 8 months ago
An Adaptive Approach to Data Placement
Programming distributed-memory machines requires careful placement of datato balance the computationalload among the nodes and minimize excess data movement between the nodes. Mos...
David K. Lowenthal, Gregory R. Andrews
ASPLOS
1996
ACM
15 years 8 months ago
The Structure and Performance of Interpreters
Interpreted languages have become increasingly popular due to demands for rapid program development, ease of use, portability, and safety. Beyond the general impression that they ...
Theodore H. Romer, Dennis Lee, Geoffrey M. Voelker...
ICPP
1993
IEEE
15 years 8 months ago
Activity Counter: New Optimization for the Dynamic Scheduling of SIMD Control Flow
SIMD or vector computers and collection-oriented languages, like C , are designed to perform the same computation on each data item or on just a subset of the data. Subsets of pro...
Ronan Keryell, Nicolas Paris
ICCAD
1994
IEEE
76views Hardware» more  ICCAD 1994»
15 years 8 months ago
An efficient procedure for the synthesis of fast self-testable controller structures
The BIST implementation of a conventionally synthesized controller in most cases requires the integration of an additional register only for test purposes. This leads to some seri...
Sybille Hellebrand, Hans-Joachim Wunderlich