Sciweavers

465 search results - page 22 / 93
» Supporting Architectural Restructuring by Analyzing Feature ...
Sort
View
SDL
2003
147views Hardware» more  SDL 2003»
15 years 1 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
KBSE
2006
IEEE
15 years 5 months ago
Modularity Analysis of Logical Design Models
Traditional design representations are inadequate for generalized reasoning about modularity in design and its technical and economic implications. We have developed an architectu...
Yuanfang Cai, Kevin J. Sullivan
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
15 years 8 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
PPOPP
2010
ACM
15 years 6 months ago
An adaptive performance modeling tool for GPU architectures
This paper presents an analytical model to predict the performance of general-purpose applications on a GPU architecture. The model is designed to provide performance information ...
Sara S. Baghsorkhi, Matthieu Delahaye, Sanjay J. P...
KBSE
2008
IEEE
15 years 6 months ago
Effort Estimation in Capturing Architectural Knowledge
Capturing and using design rationale is becoming a hot topic for software architects, as architectural design decisions are now considered first class entities that should be reco...
Rafael Capilla, Francisco Nava, Carlos Carrillo