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ECRTS
2008
IEEE
15 years 3 months ago
A Hierarchical Multiprocessor Bandwidth Reservation Scheme with Timing Guarantees
A multiprocessor scheduling scheme is presented for supporting hierarchical containers that encapsulate sporadic soft and hard real-time tasks. In this scheme, each container is a...
Hennadiy Leontyev, James H. Anderson
FPL
2010
Springer
267views Hardware» more  FPL 2010»
14 years 7 months ago
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
Gerald Hempel, Christian Hochberger, Andreas Koch
ARC
2011
Springer
220views Hardware» more  ARC 2011»
14 years 4 months ago
From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype
Abstract. In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation...
Nehir Sönmez, Oriol Arcas, Gokhan Sayilar, Os...
ECRTS
2007
IEEE
15 years 3 months ago
Tardiness Bounds for FIFO Scheduling on Multiprocessors
FIFO scheduling is often considered to be inappropriate for scheduling workloads that are subject to timing constraints. However, FIFO is implemented in many generalpurpose OSs, a...
Hennadiy Leontyev, James H. Anderson
RTAS
2006
IEEE
15 years 3 months ago
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...
Jae W. Lee, Krste Asanovic