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IFIP
2004
Springer
15 years 5 months ago
The Inherent Queuing Delay of Parallel Packet Switches
The parallel packet switch (PPS) extends the inverse multiplexing architecture, and is extensively used as the core of contemporary commercial switches. A key factor in the perfor...
Hagit Attiya, David Hay
JOCN
2011
66views more  JOCN 2011»
14 years 6 months ago
The Packet Switching Brain
■ The computer metaphor has served brain science well as a tool for comprehending neural systems. Nevertheless, we propose here that this metaphor be replaced or supplemented by...
Daniel J. Graham, Daniel N. Rockmore
ICC
2007
IEEE
163views Communications» more  ICC 2007»
15 years 6 months ago
Packet Dispatching Algorithms with the Static Connection Patterns Scheme for Three-Stage Buffered Clos-Network Switches
—Rapid expansion of the Internet and increasing demand for multimedia services fosters an immediate need for the development of new high-capacity networks capable of supporting t...
Janusz Kleban, Hugo Santos
VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
15 years 5 months ago
Interfacing Cores with On-chip Packet-Switched Networks
With the emergence of the packet-switched networks as a possible system-on-chip (SoC) communication paradigm, the design of network-on-chips (NoC) has provided a challenge to the ...
Praveen Bhojwani, Rabi N. Mahapatra
IM
2007
15 years 1 months ago
An information model for the management of Optical Burst Switched networks
Abstract— The Optical Burst Switching (OBS) paradigm proposes a new set of transmission protocols and network architectures that permits the high-utilization of the raw bandwidth...
Jorge E. López de Vergara, Javier Aracil, J...