199 search results - page 18 / 40 » Switching Activity Minimization in Combinational Logic Desig... |
91
Voted
DAC
2005
ACM
16 years 19 days ago
2005
ACM
- The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
DAC
2003
ACM
16 years 19 days ago
2003
ACM
A digital combinational logic circuit is reversible if it maps each input pattern to a unique output pattern. Such circuits are of interest in quantum computing, optical computing...
115
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INFOCOM
1998
IEEE
15 years 3 months ago
1998
IEEE
We consider the problem of constructing logical topologies over a wavelength-routed optical network with no wavelength changers. We present a general linear formulation which consi...
110
Voted
DSN
2008
IEEE
15 years 1 months ago
2008
IEEE
The combination of continued technology scaling and increased on-chip transistor densities has made vulnerability to radiation induced soft errors a significant design concern. In...
73
Voted
DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...