199 search results - page 6 / 40 » Switching Activity Minimization in Combinational Logic Desig... |
DAC
1995
ACM
15 years 3 months ago
1995
ACM
- Power estimation in combinational modules is addressed from a probabilistic point of view. The zero-delay hypothesis is considered and under highly correlated input streams, the ...
APCCAS
2006
IEEE
15 years 5 months ago
2006
IEEE
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
DATE
2005
IEEE
15 years 5 months ago
2005
IEEE
Recent work on Differential Power Analysis shows that even mathematically-secure cryptographic protocols may be vulnerable at the physical implementation level. By measuring energ...
CADE
1998
Springer
15 years 3 months ago
1998
Springer
Abstract. The rank/activity restriction on binary resolution is introduced. It accepts only a single derivation tree from a large equivalence class of such trees. The equivalence c...
ISCAS
2008
IEEE
15 years 6 months ago
2008
IEEE
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...