Interconnect architecture is a primary research issue for emerging many-core processors. Packet switched Networks-on-Chip (NoCs) are considered key to success but since they delive...
—This paper examines the possible uses of different market mechanisms for resource allocation at different levels of Wireless Sensor Network (WSN) architecture. The goal is to ma...
Boleslaw K. Szymanski, S. Yousaf Shah, Sahin Cem G...
Abstract—This paper describes the implementation of ARPPath (a.k.a. FastPath) bridges, a recently proposed concept for low latency bridges, in Linux/Soekris and OpenFlow/NetFPGA ...
Data center networks encode locality and topology information into their server and switch addresses for performance and routing purposes. For this reason, the traditional address...
Kai Chen, Chuanxiong Guo, Haitao Wu, Jing Yuan, Zh...
This paper deals with the challenging problem of counting the number of solutions of a CSP, denoted #CSP. Recent progress have been made using search methods, such as BTD [15], whi...