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» Switching Graphs and Their Complexity
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ICCD
2003
IEEE
147views Hardware» more  ICCD 2003»
16 years 2 months ago
An Efficient VLIW DSP Architecture for Baseband Processing
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
Tay-Jyi Lin, Chin-Chi Chang, Chen-Chia Lee, Chein-...
ICASSP
2008
IEEE
16 years 9 days ago
Discrete rate spectral efficiency for adaptive MIMO systems
Adaptive modulation scheme has been widely used in multipleinput multiple-output (MIMO) systems to enhance spectral efficiency while maintaining bit-error rate (BER) under a targ...
Jinliang Huang, Svante Signell
ICASSP
2008
IEEE
16 years 9 days ago
Impact of channel estimation error on performance of adaptive MIMO systems
Adaptive modulation scheme has been widely used in multipleinput multiple-output (MIMO) systems to enhance the spectral efficiency while maintaining the bit-error-rate (BER) unde...
Jinliang Huang, Svante Signell
RTSS
2008
IEEE
16 years 7 days ago
Priority Assignment for Real-Time Wormhole Communication in On-Chip Networks
—Wormhole switching with fixed priority preemption has been proposed as a possible solution for real-time on-chip communication. However, none of current priority assignment pol...
Zheng Shi, Alan Burns
SBACPAD
2007
IEEE
130views Hardware» more  SBACPAD 2007»
16 years 4 days ago
Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh