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ASPDAC
1995
ACM
85views Hardware» more  ASPDAC 1995»
15 years 5 months ago
High-level synthesis scheduling and allocation using genetic algorithms
In this article a scheduling method is presented which is capable of allocating supplementary resources during scheduling. This makes it very suitable in synthesis strategies base...
Marc J. M. Heijligers, L. J. M. Cluitmans, Jochen ...
DAC
2008
ACM
16 years 2 months ago
Automatic synthesis of clock gating logic with controlled netlist perturbation
Clock gating is the insertion of combinational logic along the clock path to prevent the unnecessary switching of registers and reduce dynamic power consumption. The conditions un...
Aaron P. Hurst
LICS
2005
IEEE
15 years 7 months ago
A Polynomial Time Presburger Criterion and Synthesis for Number Decision Diagrams
Number Decision Diagrams (NDD) are the automatabased symbolic representation for manipulating sets of integer vectors encoded as strings of digit vectors (least or most significa...
Jérôme Leroux
ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
15 years 6 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
RV
2009
Springer
94views Hardware» more  RV 2009»
15 years 8 months ago
Monitor Circuits for LTL with Bounded and Unbounded Future
Synthesizing monitor circuits for LTL formulas is expensive, because the number of flip-flops in the circuit is exponential in the length of the formula. As a result, the IEEE st...
Bernd Finkbeiner, Lars Kuhtz