102 search results - page 4 / 21 » Symbolic Model Checking for Probabilistic Processes |
CAV
2006
Springer
15 years 3 months ago
2006
Springer
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
109
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GLVLSI
2000
IEEE
15 years 4 months ago
2000
IEEE
Symbolic Model checking is a widely used technique in sequential verification. As the size of the OBDDs and also the computation time depends on the order of the input variables,...
FMCAD
2004
Springer
15 years 5 months ago
2004
Springer
We consider the problem of checking whether an incomplete design can still be extended to a complete design satisfying a given CTL formula and whether the property is satisfied fo...
FDL
2003
IEEE
15 years 5 months ago
2003
IEEE
Assuring correctness of digital designs is one of the major tasks in the system design flow. Formal methods have been proposed to accompany commonly used simulation approaches. I...
100
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APN
2008
Springer
15 years 1 months ago
2008
Springer
Model checking is a powerful and widespread technique for the verification of finite distributed systems. However, the main hindrance for wider application of this technique is the...