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DAC
2003
ACM
16 years 4 months ago
State-based power analysis for systems-on-chip
Early power analysis for systems-on-chip (SoC) is crucial for determining the appropriate packaging and cost. This early analysis commonly relies on evaluating power formulas for ...
Reinaldo A. Bergamaschi, Yunjian Jiang
181
Voted
VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
16 years 3 months ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
122
Voted
DCC
2002
IEEE
16 years 2 months ago
PPMexe: PPM for Compressing Software
With the emergence of software delivery platforms such as Microsoft's .NET, code compression has become one of the core enabling technologies strongly affecting system perfor...
Milenko Drinic, Darko Kirovski
CODES
2009
IEEE
15 years 10 months ago
Exploiting data-redundancy in reliability-aware networked embedded system design
This paper presents a system-level design methodology for networked embedded systems that exploits existing data-redundancy to increase their reliability. The presented approach n...
Martin Lukasiewycz, Michael Glaß, Jürge...
IWPC
2009
IEEE
15 years 10 months ago
A plethora of paths
A common static software bug detection technique is to use path simulation. Each execution path is simulated using symbolic variables to determine if any software errors could occ...
Eric Larson