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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
14 years 7 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
HIPC
2009
Springer
14 years 7 months ago
Distance-aware round-robin mapping for large NUCA caches
In many-core architectures, memory blocks are commonly assigned to the banks of a NUCA cache by following a physical mapping. This mapping assigns blocks to cache banks in a round-...
Alberto Ros, Marcelo Cintra, Manuel E. Acacio, Jos...
IEEEPACT
2009
IEEE
14 years 7 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...
BMCBI
2010
164views more  BMCBI 2010»
14 years 7 months ago
Merged consensus clustering to assess and improve class discovery with microarray data
Background: One of the most commonly performed tasks when analysing high throughput gene expression data is to use clustering methods to classify the data into groups. There are a...
T. Ian Simpson, J. Douglas Armstrong, Andrew P. Ja...
GIS
2010
ACM
14 years 7 months ago
Energy-efficient processing of spatio-temporal queries in wireless sensor networks
Research on Moving Object Databases (MOD) has resulted in sophisticated query mechanisms for moving objects and regions. Wireless Sensor Networks (WSN) support a wide range of app...
Markus Bestehorn, Klemens Böhm, Erik Buchmann...
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