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» Synapses as dynamic memory buffers
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ICS
2001
Tsinghua U.
13 years 11 months ago
Slice-processors: an implementation of operation-based prediction
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...
SIGMOD
2005
ACM
138views Database» more  SIGMOD 2005»
14 years 6 months ago
QPipe: A Simultaneously Pipelined Relational Query Engine
Relational DBMS typically execute concurrent queries independently by invoking a set of operator instances for each query. To exploit common data retrievals and computation in con...
Stavros Harizopoulos, Vladislav Shkapenyuk, Anasta...
BROADNETS
2005
IEEE
14 years 1 days ago
Optimal path selection for ethernet over SONET under inaccurate link-state information
— Ethernet over SONET (EoS) is a popular approach for interconnecting geographically distant Ethernet segments using a SONET transport infrastructure. It typically uses virtual c...
Satyajeet Ahuja, Marwan Krunz, Turgay Korkmaz
ISCA
2005
IEEE
117views Hardware» more  ISCA 2005»
14 years 16 hour ago
Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization
The load-store unit is a performance critical component of a dynamically-scheduled processor. It is also a complex and non-scalable component. Several recently proposed techniques...
Amir Roth
RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
13 years 10 months ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya