96 search results - page 4 / 20 » Synapses as dynamic memory buffers |
RTCSA
2008
IEEE
14 years 18 days ago
2008
IEEE
The demand for real-time data services in embedded systems is increasing. In these new computing platforms, using traditional buffer management schemes, whose goal is to minimize ...
TVLSI
2008
13 years 6 months ago
2008
This paper proposes a high-performance scalable quality-of-service (QoS)-aware memory controller for the packet memory where packet data are stored in network routers. A major chal...
FPL
2008
Springer
13 years 7 months ago
2008
Springer
In multi-context Dynamically Reconfigurable Processor Array (DRPA), the required number of contexts is often increased by those with low resource usage. In order to execute such c...
TC
2008
13 years 6 months ago
2008
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
CCECE
2009
IEEE
14 years 1 months ago
2009
IEEE
— Most of the existing video streaming systems employ the worst case analysis in application layer buffer size dimensioning. Even though the worst case buffer size dimensioning p...