—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
JunBok You, Yang Xu, Hosuk Han, Kenneth S. Stevens
The latency of broadcast/reduction operations has a significant impact on the performance of SIMD processors. This is especially true for associative programs, which make extensiv...
This paper reviews a set of techniques for compiling dataflow-based, graphical programs for embedded signal processing applications into efficient implementations on programmable ...
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward...
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...