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» Synchronization and Communication in the T3E Multiprocessor
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ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 2 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
DSD
2010
IEEE
110views Hardware» more  DSD 2010»
14 years 9 months ago
A Predictable Multiprocessor Design Flow for Streaming Applications with Dynamic Behaviour
—The design of new embedded systems is getting more and more complex as more functionality is integrated into these systems. To deal with the design complexity, a predictable des...
Sander Stuijk, Marc Geilen, Twan Basten
75
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IPPS
2006
IEEE
15 years 3 months ago
Helper thread prefetching for loosely-coupled multiprocessor systems
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
Changhee Jung, Daeseob Lim, Jaejin Lee, Yan Solihi...
ICPP
1997
IEEE
15 years 1 months ago
Automatic Parallelization and Scheduling of Programs on Multiprocessors using CASCH
r The lack of a versatile software tool for parallel program development has been one of the major obstacles for exploiting the potential of high-performance architectures. In this...
Ishfaq Ahmad, Yu-Kwong Kwok, Min-You Wu, Wei Shu
ISCA
2011
IEEE
238views Hardware» more  ISCA 2011»
14 years 1 months ago
Rebound: scalable checkpointing for coherent shared memory
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
Rishi Agarwal, Pranav Garg, Josep Torrellas