Abstract. The design flow of systems-on-a-chip (SoCs) identifies several abstraction levels higher than the Register-Transfer-Level that constitutes the input of the synthesis tool...
Claude Helmstetter, Florence Maraninchi, Laurent M...
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Flexible user interfaces that can be customized to meet the needs of the task at hand are particularly important for real-time group collaboration. This paper presents the user in...
Critical sections in database storage engines impact performance and scalability more as the number of hardware contexts per chip continues to grow exponentially. With enough thre...
Ryan Johnson, Ippokratis Pandis, Anastasia Ailamak...
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
David L. Andrews, Ron Sass, Erik Anderson, Jason A...