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» Synchronization of periodic clocks
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ICCD
2008
IEEE
142views Hardware» more  ICCD 2008»
15 years 8 months ago
Gate planning during placement for gated clock network
Abstract— Clock gating is a popular technique for reducing power dissipation in clock network. Although there have been numerous research efforts on clock gating, the previous ap...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
VLSID
2005
IEEE
87views VLSI» more  VLSID 2005»
16 years 2 months ago
Synthesis of Asynchronous Circuits Using Early Data Validity
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...
Nitin Gupta, Doug A. Edwards
ICCAD
2004
IEEE
87views Hardware» more  ICCAD 2004»
15 years 10 months ago
Exploiting level sensitive latches in wire pipelining
Wire pipelining emerges as a new necessity for global wires due to increasing wire delay, shrinking clock period and growing chip size. Existing approaches on wire pipelining are ...
V. Seth, Min Zhao, Jiang Hu
SASO
2007
IEEE
15 years 8 months ago
Desynchronization: The Theory of Self-Organizing Algorithms for Round-Robin Scheduling
The study of synchronization has received much attention in a variety of applications, ranging from coordinating sensors in wireless networks to models of fireflies flashing in...
Ankit Patel, Julius Degesys, Radhika Nagpal
ICTCS
2005
Springer
15 years 7 months ago
Faster Deterministic Wakeup in Multiple Access Channels
We consider the fundamental problem of waking up n processors sharing a multiple access channel. We assume the weakest model of synchronization, the locally synchronous model, in ...
Gianluca De Marco, Marco Pellegrini, Giovanni Sbur...