651 search results - page 43 / 131 » Synchronization of periodic clocks |
88
Voted
GLVLSI
2000
IEEE
15 years 6 months ago
2000
IEEE
In this paper a wave-pipelining scheme is used to increase the performance of a router architecture. Wave-pipelining has a potential of significantly reducing clock cycle time an...
ASPDAC
2004
ACM
15 years 7 months ago
2004
ACM
– In this paper, we propose a method for extracting the spectral information of a multi-gigahertz jittery signal. This method may utilize existing on-chip single-shot period meas...
124
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ISPD
2004
ACM
15 years 7 months ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
101
Voted
ICC
2000
IEEE
15 years 6 months ago
2000
IEEE
— In this paper1 an optimum and sub-optimum maximum likelihood (ML) rule for joint frame and carrier frequency offset estimation are derived, which rely on the transmission of a...
115
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ASYNC
2002
IEEE
15 years 7 months ago
2002
IEEE
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...