651 search results - page 49 / 131 » Synchronization of periodic clocks |
114
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DATE
2008
IEEE
15 years 8 months ago
2008
IEEE
The NETWORK-ON-CHIP (NOC) interconnection paradigm has been gaining momentum thanks to its flexibility, scalability and suitability to deep submicron technology processes. The ne...
112
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GLVLSI
2003
IEEE
15 years 7 months ago
2003
IEEE
The realization of fast datapaths in signal processing environments requires fastest, power efficient logic styles with synchronous behavior. This paper presents a method to combi...
VLSI
2010
Springer
15 years 9 days ago
2010
Springer
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
119
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DATE
2006
IEEE
15 years 5 months ago
2006
IEEE
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
DATE
2009
IEEE
15 years 8 months ago
2009
IEEE
- Clock skew scheduling (CSS) is an effective technique to optimize clock period of sequential designs. However, these techniques are not effective in the presence of certain desig...