651 search results - page 86 / 131 » Synchronization of periodic clocks |
ICCD
1995
IEEE
15 years 3 months ago
1995
IEEE
Many design techniques have been proposed to optimize the performance of a digital system implemented in a given technology. Each of these techniques can be advantageous in partic...
111
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ISLPED
2007
ACM
15 years 1 months ago
2007
ACM
Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...
MJ
2008
14 years 11 months ago
2008
Circuits optimized for minimum energy consumption operate typically in the subthreshold regime with ultra-low power-supply voltages. Speed of a subthreshold logic circuit is enhan...
106
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REALWSN
2010
14 years 6 months ago
2010
Abstract. Environmental scientists frequently engage in "campaignstyle" deployments, where they visit a location for a relatively short period of time (several weeks to m...
ICPP
1987
IEEE
15 years 3 months ago
1987
IEEE
-- A hardware fault tolerance scheme for large multicomputers executing time-consuming non-interactive applications is described. Error detection and recovery are done mostly by so...