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» Synchronization of periodic clocks
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FTCS
1998
89views more  FTCS 1998»
15 years 1 months ago
The Timed Asynchronous Distributed System Model
Abstract-- We propose a formal definition for the timed asynchronous distributed system model. We present extensive measurements of actual message and process scheduling delays and...
Flaviu Cristian, Christof Fetzer
ENTCS
2006
176views more  ENTCS 2006»
14 years 11 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
FTEDA
2007
78views more  FTEDA 2007»
14 years 11 months ago
Design Automation of Real-Life Asynchronous Devices and Systems
The number of gates on a chip is quickly growing toward and beyond the one billion mark. Keeping all the gates running at the beat of a single or a few rationally related clocks i...
Alexander Taubin, Jordi Cortadella, Luciano Lavagn...
ISCAS
2007
IEEE
107views Hardware» more  ISCAS 2007»
15 years 6 months ago
Architecture Level Power-Performance Tradeoffs for Pipelined Designs
Abstract—This paper presents a method to investigate powerperformance tradeoffs in digital pipelined designs. The method is applied at the architectural level of the design. It w...
Haider Ali, Bashir M. Al-Hashimi
RSP
2006
IEEE
102views Control Systems» more  RSP 2006»
15 years 5 months ago
Rapid Resource-Constrained Hardware Performance Estimation
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...