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» Synthesis of Application Specific Programmable Processors
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FPL
2006
Springer
105views Hardware» more  FPL 2006»
15 years 1 months ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
ISSS
2002
IEEE
174views Hardware» more  ISSS 2002»
15 years 2 months ago
A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
Carles Rodoreda Sala, Natalino G. Busá
ASAP
2006
IEEE
108views Hardware» more  ASAP 2006»
15 years 1 months ago
New Schemes in Clustered VLIW Processors Applied to Turbo Decoding
State-of-the-art communication standards make extensive use of Turbo codes. The complex and power consuming designs that currently implement the turbo decoder expose the need for ...
Pablo Ituero, Marisa López-Vallejo
DAC
1999
ACM
15 years 10 months ago
Synthesis of Embedded Software Using Free-Choice Petri Nets
Software synthesis from a concurrent functional specification is a key problem in the design of embedded systems. A concurrent specification is well-suited for medium-grained part...
Marco Sgroi, Luciano Lavagno
VLSID
2002
IEEE
174views VLSI» more  VLSID 2002»
15 years 10 months ago
Architecture Implementation Using the Machine Description Language LISA
The development of application specific instruction set processors comprises several design phases: architecture exploration, software tools design, system verification and design...
Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, ...