82 search results - page 16 / 17 » Synthesis of High Performance Low Power Dynamic CMOS Circuit... |
ISCAS
2008
IEEE
15 years 3 months ago
2008
IEEE
— Long distance, low data-rate UWB communication for sensor network applications requires a highly energy efficient transceiver combined with circuit and system-level optimizati...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
MICRO
2008
IEEE
15 years 3 months ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
DAC
2001
ACM
15 years 10 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
ISCAS
1999
IEEE
15 years 1 months ago
1999
IEEE
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...