82 search results - page 4 / 17 » Synthesis of High Performance Low Power Dynamic CMOS Circuit... |
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
102
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ISVLSI
2002
IEEE
15 years 2 months ago
2002
IEEE
With technology scaling, power supply and threshold voltage continue to decrease to satisfy high performance and low power requirements. In the past, subthreshold CMOS circuits ha...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
This work is a contribution to high level synthesis for low power systems. While device feature size decreases, interconnect power becomes a dominating factor. Thus it is importan...
VLSID
2002
IEEE
15 years 9 months ago
2002
IEEE
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
ISCAS
2007
IEEE
15 years 3 months ago
2007
IEEE
— Domino circuits are used to achieve higher system performance than static CMOS techniques. This work briefly surveys domino keeper designs for high fan-in domino circuits. A ne...