82 search results - page 6 / 17 » Synthesis of High Performance Low Power Dynamic CMOS Circuit... |
CDES
2006
14 years 10 months ago
2006
- The need for faster circuits in smaller area with lower power dissipation has made it a common practice to use the domino CMOS in high performance integrated circuits. However th...
ICCAD
1995
IEEE
15 years 1 months ago
1995
IEEE
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
ISPD
2010
ACM
15 years 4 months ago
2010
ACM
As the thermal wall becomes the dominant factor limiting VLSI circuit performance, and the interconnect wires become the primary power consumer, power efficiency of onchip data th...
ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
ISQED
2006
IEEE
15 years 3 months ago
2006
IEEE
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...