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» Synthesis of Operation-Centric Hardware Descriptions
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ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
15 years 6 months ago
A code refinement methodology for performance-improved synthesis from C
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Greg Stitt, Frank Vahid, Walid A. Najjar
CASES
2008
ACM
14 years 11 months ago
Optimus: efficient realization of streaming applications on FPGAs
In this paper, we introduce Optimus: an optimizing synthesis compiler for streaming applications. Optimus compiles programs written in a high level streaming language to either so...
Amir Hormati, Manjunath Kudlur, Scott A. Mahlke, D...
70
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ISCAS
2005
IEEE
96views Hardware» more  ISCAS 2005»
15 years 3 months ago
Synthesis of MITE log-domain filters with unique operating points
Abstract— Practical log-domain filter circuits might have multiple operating points in regions in which the translinear element does not obey the exponential law. In this paper,...
Shyam Subramanian, David V. Anderson, Paul E. Hasl...
DATE
2009
IEEE
125views Hardware» more  DATE 2009»
15 years 4 months ago
HLS-l: High-level synthesis of high performance latch-based circuits
An inherent performance gap between custom designs and ASICs is one of the reasons why many designers still start their designs from register transfer level (RTL) description rath...
Seungwhun Paik, Insup Shin, Youngsoo Shin
ASPDAC
2005
ACM
98views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Bitwidth-aware scheduling and binding in high-level synthesis
- Many high-level description languages, such as C/C++ or Java, lack the capability to specify the bitwidth information for variables and operations. Synthesis from these specifica...
Jason Cong, Yiping Fan, Guoling Han, Yizhou Lin, J...