127 search results - page 24 / 26 » Synthesis of Operation-Centric Hardware Descriptions |
TC
2010
14 years 7 months ago
2010
—Due to the widespread use and inherent complexity of floating-point addition, much effort has been devoted to its speedup via algorithmic and circuit techniques. We propose a ne...
IGARSS
2010
14 years 7 months ago
2010
The Level 1 Processing of SMOS transforms the data acquired by MIRAS (Microwave Imaging Radiometer with Aperture Synthesis) into geolocated TOA Brightness Temperatures, providing ...
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FPGA
2006
ACM
15 years 1 months ago
2006
ACM
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
SAMOS
2007
Springer
15 years 3 months ago
2007
Springer
—This paper presents a new methodology based on evolutionary multi-objective optimization (EMO) to synthesize multiple complex modules on programmable devices (FPGAs). It starts ...
ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...