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» Synthesis of Operation-Centric Hardware Descriptions
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91
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FPL
2009
Springer
132views Hardware» more  FPL 2009»
15 years 1 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem
88
Voted
DAC
2011
ACM
13 years 9 months ago
Enforcing architectural contracts in high-level synthesis
We present a high-level synthesis technique that takes as input two orthogonal descriptions: (a) a behavioral architectural contract between the implementation and the user, and (...
Nikhil A. Patil, Ankit Bansal, Derek Chiou
79
Voted
FDL
2008
IEEE
15 years 3 months ago
Towards Compilation of Streaming Programs into FPGA Hardware
There is an increasing need for automated conversion of high-level design descriptions into hardware. We present a flow that converts a software application written in the Brook ...
Franjo Plavec, Zvonko G. Vranesic, Stephen Dean Br...
101
Voted
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
15 years 1 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...
DAC
1992
ACM
15 years 1 months ago
Synthesis from Production-Based Specifications
This paper describes a model for, and an implementation of, production-based synthesis of hardware description language (HDL) code in which the overall structure of the resultant ...
Andrew Seawright, Forrest Brewer