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» Synthesis of Reversible Logic
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ITC
1999
IEEE
78views Hardware» more  ITC 1999»
15 years 2 months ago
Minimized power consumption for scan-based BIST
Power consumption of digital systems may increase significantly during testing. In this paper, systems equipped with a scan-based built-in self-test like the STUMPS architecture a...
Stefan Gerstendörfer, Hans-Joachim Wunderlich
IJCAI
1993
14 years 11 months ago
Nonmonotonic Model Inference-A Formalization of Student Modeling
A student model description language and its synthesis method are presented. The language called SMDL is based on a logic programming language taking 4 truth values such as true, ...
Mitsuru Ikeda, Yasuyuki Kono, Riichiro Mizoguchi
ACSC
2006
IEEE
15 years 3 months ago
Manufacturing opaque predicates in distributed systems for code obfuscation
Code obfuscation is a relatively new technique of software protection and it works by deterring reverse engineering attempts by malicious users of software. The objective of obfus...
Anirban Majumdar, Clark D. Thomborson
ISMVL
2005
IEEE
108views Hardware» more  ISMVL 2005»
15 years 3 months ago
Approaching the Physical Limits of Computing
As logic device sizes shrink towards the nanometer scale, a number of important physical limits threaten to soon halt further improvements in computer performance per unit cost. H...
Michael P. Frank
TFS
2011
194views Education» more  TFS 2011»
14 years 4 months ago
Top-Down Induction of Fuzzy Pattern Trees
Fuzzy pattern tree induction was recently introduced as a novel machine learning method for classification. Roughly speaking, a pattern tree is a hierarchical, tree-like structur...
R. Senge, Eyke Hüllermeier