688 search results - page 104 / 138 » Synthesis of Reversible Logic |
FPGA
2008
ACM
14 years 11 months ago
2008
ACM
Architecture development for FPGAs has typically been a very empirical discipline, requiring the synthesis of benchmark circuits into candidate architectures. This is difficult to...
ASE
2010
14 years 10 months ago
2010
Recent developments in runtime verification and monitoring show that parametric regular and temporal logic specifications can be efficiently monitored against large programs. Howev...
ENTCS
2006
14 years 9 months ago
2006
Monitoring-oriented programming (MOP) is a software development and analysis technique in which monitoring plays a fundamental role. MOP users can add their favorite or domain-spe...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
A modular synthesis flow is essential for a scalable and hierarchical design methodology. This paper considers a particular modular flow where each module has interface methods an...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Ever-growing complexity is forcing design to move above RTL. For example, golden functional models are being written as clearly as possible in software and not optimized or intend...