688 search results - page 108 / 138 » Synthesis of Reversible Logic |
ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—We investigate restructuring techniques based on decomposition/factorization, with the objective to move critical signals toward the output while minimizing area. A specific ap...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—Redundancy Addition and Removal (RAR) is a restructuring technique used in the synthesis and optimization of logic designs. It can remove an existing target wire and add an alte...
GECCO
2009
Springer
15 years 4 months ago
2009
Springer
We propose a crossover operator that works with genetic programming trees and is approximately geometric crossover in the semantic space. By defining semantic as program’s eval...
RV
2009
Springer
15 years 4 months ago
2009
Springer
Synthesizing monitor circuits for LTL formulas is expensive, because the number of flip-flops in the circuit is exponential in the length of the formula. As a result, the IEEE st...