688 search results - page 109 / 138 » Synthesis of Reversible Logic |
IOLTS
2008
IEEE
15 years 4 months ago
2008
IEEE
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
AHS
2007
IEEE
15 years 4 months ago
2007
IEEE
System-on-Chip devices containing both conventional and reconfigurable circuits are increasing in popularity. However the on-chip debug support infrastructure required to aid syst...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
Scheduling is an important step in high-level synthesis (HLS). In our tool, we perform scheduling in two steps: coarse-grain scheduling, in which we take into account the whole co...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...
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ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
— Reduced ordered Binary Decision Diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synt...