688 search results - page 112 / 138 » Synthesis of Reversible Logic |
ISSS
1998
IEEE
15 years 2 months ago
1998
IEEE
With the decreasing feature sizes during VLSI fabrication and the dominance of interconnect delay over that of gates, control logic and wiring no longer have a negligible impact o...
ICCAD
1994
IEEE
15 years 1 months ago
1994
IEEE
We study a new placement problem: the reproducing placement problem (RPP). In each phase a module (or gate) is decomposed into two (or more) simpler modules. The goal is nd a \go...
CF
2004
ACM
15 years 1 months ago
2004
ACM
In this paper we present a novel methodology for partial (re-)configuration that can be used for most bitstream configured hardware (HW). In particular low priced and not for part...
EURODAC
1995
IEEE
15 years 1 months ago
1995
IEEE
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
119
click to vote
DAC
1994
ACM
15 years 1 months ago
1994
ACM
Regarding nite state machines as Markov chains facilitates the application of probabilistic methods to very large logic synthesis and formal veri cation problems. Recently, we ha...