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» Synthesis of Reversible Logic
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ASAP
2004
IEEE
140views Hardware» more  ASAP 2004»
15 years 1 months ago
Decimal Floating-Point Division Using Newton-Raphson Iteration
Decreasing feature sizes allow additional functionality to be added to future microprocessors to improve the performance of important application domains. As a result of rapid gro...
Liang-Kai Wang, Michael J. Schulte
ESORICS
2006
Springer
15 years 1 months ago
Policy-Driven Memory Protection for Reconfigurable Hardware
Abstract. While processor based systems often enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reconfigurable har...
Ted Huffmire, Shreyas Prasad, Timothy Sherwood, Ry...
FPL
2006
Springer
158views Hardware» more  FPL 2006»
15 years 1 months ago
Actual-Delay Circuits on FPGA: Trading-Off Luts for Speed
FPGA devices exhibit manufacturing variability. Device ratings and Timing margins are typically used in order to cope with inter-device and intra-device variability respectively. ...
Evangelia Kassapaki, Pavlos M. Mattheakis, Christo...
ASAP
2009
IEEE
119views Hardware» more  ASAP 2009»
15 years 1 months ago
A Low Power High Performance Radix-4 Approximate Squaring Circuit
An implementation of a radix-4 approximate squaring circuit is described employing a new operand dual recoding technique. Approximate squaring circuits have numerous applications ...
Satyendra R. Datla, Mitchell A. Thornton, David W....
ECIR
2006
Springer
14 years 11 months ago
An Information Retrieval System for Motion Capture Data
Motion capturing has become an important tool in fields such as sports sciences, biometrics, and particularly in computer animation, where large collections of motion material are ...
Bastian Demuth, Tido Röder, Meinard Müll...