688 search results - page 131 / 138 » Synthesis of Reversible Logic |
FMSD
2006
14 years 9 months ago
2006
Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or p...
IJAIT
2006
14 years 9 months ago
2006
We describe a system for the automated certification of safety properties of NASA software. The system uses Hoare-style program verification technology to generate proof obligatio...
TCAD
2008
14 years 9 months ago
2008
Detecting symmetries has many applications in logic synthesis that include, amongst other things, technology mapping, deciding equivalence of Boolean functions when the input corre...
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TCAD
2002
14 years 9 months ago
2002
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuits...
ASPDAC
2010
ACM
14 years 7 months ago
2010
ACM
Abstract-- Optimizing blocks in a System-on-Chip (SoC) circuit is becoming more and more important nowadays due to the use of third-party Intellectual Properties (IPs) and reused d...