688 search results - page 136 / 138 » Synthesis of Reversible Logic |
65
Voted
ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
Technology-independenttimingoptimizationis animportantproblem in logic synthesis. Although many promising techniques have been proposed in the past, unfortunately they are quite s...
87
Voted
ICCAD
1994
IEEE
15 years 1 months ago
1994
IEEE
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
76
Voted
ASPDAC
2007
ACM
15 years 1 months ago
2007
ACM
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...
ISSTA
2010
ACM
15 years 1 months ago
2010
ACM
In program debugging, finding a failing run is only the first step; what about correcting the fault? Can we automate the second task as well as the first? The AutoFix-E tool au...
GLVLSI
2009
IEEE
15 years 1 months ago
2009
IEEE
Recent technology mappers for LUT based FPGAs employ cut enumeration. Although many cuts are often needed to nd good network, enumerating all cuts with large size consumes run-tim...