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» Synthesis of Reversible Logic
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GLVLSI
2008
IEEE
117views VLSI» more  GLVLSI 2008»
15 years 4 months ago
Delay driven AIG restructuring using slack budget management
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...
Andrew C. Ling, Jianwen Zhu, Stephen Dean Brown
ISMVL
2009
IEEE
124views Hardware» more  ISMVL 2009»
15 years 4 months ago
Equivalence Checking of Reversible Circuits
Determining the equivalence of reversible circuits designed to meet a common specification is considered. The circuits’ primary inputs and outputs must be in pure logic states ...
Robert Wille, Daniel Große, D. Michael Mille...
ICCD
1993
IEEE
124views Hardware» more  ICCD 1993»
15 years 1 months ago
Synthesis of Controllers from Interval Temporal Logic Specification
for a state machine which is an abstraction for an existing sequential circuit, which can be useful for redesign or engineering change. The generated state machines can be further ...
Masahiro Fujita, Shinji Kono
IJIT
2004
14 years 11 months ago
Synthesis of Logic Circuits Using Fractional-Order Dynamic Fitness Functions
This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuit...
Cecília Reis, José António Te...
DATE
2004
IEEE
128views Hardware» more  DATE 2004»
15 years 1 months ago
Synthesis for Manufacturability: A Sanity Check
As we move towards nanometer technology, manufacturing problems become overwhelmingly difficult to solve. Presently, optimization for manufacturability is performed at a post-synt...
Alessandra Nardi, Alberto L. Sangiovanni-Vincentel...