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» Synthesis of Reversible Logic
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VLSID
1999
IEEE
86views VLSI» more  VLSID 1999»
15 years 2 months ago
Multi-Valued Logic Synthesis
We survey some of the methods used for manipulating, representing, and optimizing multi-valued logic with the view of both building a better understanding of the more specialized ...
Robert K. Brayton, Sunil P. Khatri
DATE
2008
IEEE
142views Hardware» more  DATE 2008»
15 years 4 months ago
Approximate logic circuits for low overhead, non-intrusive concurrent error detection
This paper describes a scalable, technology-independent algorithm for the synthesis of approximate logic circuits. A low overhead, non-intrusive solution for concurrent error dete...
Mihir R. Choudhury, Kartik Mohanram
CAV
2010
Springer
286views Hardware» more  CAV 2010»
14 years 10 months ago
ABC: An Academic Industrial-Strength Verification Tool
ABC is a public-domain system for logic synthesis and formal verification of binary logic circuits appearing in synchronous hardware designs. ABC combines scalable logic transforma...
Robert K. Brayton, Alan Mishchenko
CIT
2006
Springer
15 years 1 months ago
Design of Novel Reversible Carry Look-Ahead BCD Subtractor
IEEE 754r is the ongoing revision to the IEEE 754 floating point standard. A major enhancement to the standard is the addition of decimal format, thus the design of BCD arithmetic...
Himanshu Thapliyal, Sumedha K. Gupta
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 2 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi