688 search results - page 19 / 138 » Synthesis of Reversible Logic |
DAC
2001
ACM
15 years 10 months ago
2001
ACM
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...
ISMVL
2003
IEEE
15 years 3 months ago
2003
IEEE
Galois Field Sum of Products (GFSOP) leads to efficient multi-valued reversible circuit synthesis using quantum gates. In this paper, we propose a new generalization of ternary To...
CONPAR
1992
15 years 1 months ago
1992
The algorithm designed in [12, 15] was the very first distributed algorithm to solve the mutual exclusion problem in complete networks by using a dynamic logical tree structure as...
FPGA
2006
ACM
15 years 1 months ago
2006
ACM
Abstract--Field-programmable gate-array (FPGA) logic synthesis and technology mapping have been studied extensively over the past 15 years. However, progress within the last few ye...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
Timing closure problems occur when timing estimates computed during logic synthesis do not match with timing estimates computed from the layout of the circuit. In such a situation...