688 search results - page 26 / 138 » Synthesis of Reversible Logic |
FPGA
2004
ACM
15 years 3 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
ICCAD
1995
IEEE
15 years 1 months ago
1995
IEEE
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
107
click to vote
ISPD
2012
ACM
13 years 5 months ago
2012
ACM
There are two prominent problems with technology scaling: increasing design complexity and more challenges with interconnect design, including routability. High-level synthesis ha...
101
click to vote
DATE
2000
IEEE
15 years 2 months ago
2000
IEEE
Pass Transistor Logic has attracted more and more interest during last years, since it has proved to be an attractive alternative to static CMOS designs with respect to area, perf...
WWW
2009
ACM
15 years 10 months ago
2009
ACM
In this paper, we propose a novel approach for composing existing web services to satisfy the correctness constraints to the design, including freeness of deadlock and unspecified...